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1/17 www.rohm.com 2010.07 - rev. a ? 2010 rohm co., ltd. all rights reserved. high reliability serial eeproms wl-csp eeprom family microwire bus bu9891gul-w description bu9891gul-w is serial eeprom of serial 3-line in terface method features 1) 3-line communications of chip select, serial clock, serial data input / output (the case where input and output are shared) 2) actions available at high speed 2mhz clock (2.5~5.5v) 3) speed write available (write time 5ms max.) 4) 1.7~5.5v single power source action 5) address auto increment function at read action 6) write mistake prevention function write prohibition at power on write prohibition by command code write mistake prevention function at low voltage 7) program cycle auto delete and auto end function 8) program condition display by ready / busy 9) low current consumption at write action (at 5v): 1.2ma (typ.) at read action (at 5v): 0.3ma (typ.) at standby action (at 5v): 0.1 a (typ.) (cmos input) 10) data retention for 40 years 11) data rewrite up to 100,000 times 12) data at shipment all addresses ffffh capacity bit format type powe r source voltage package type 4kbit 256 16 bu9891gul-w 1.7~5.5v vcsp50l1 absolute ma ximum ratings(ta=25 ) parameter symbol ratings unit impressed voltage vcc -0.3~+6.5 v permissible dissipation pd 220 (vcsp50l1 ) *1 mw storage temperature range tstg -65~+125 action temperature range topr -40~+85 terminal voltage \ -0.3~vcc+0.3 v * when using at ta=25 or higher, 2.2mw (to be reduced per 1 . no.10001eat10
bu9891gul-w 2/17 www.rohm.com 2010.07 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note recommended action conditions parameter symbol ratings unit power source voltage vcc 1.7~5.5 v input voltage v in 0~vcc memory cell characteristics (vcc=1.7~5.5v) parameter limit unit condition min. typ. max. number of data rewrite times *1 100,000 - - times ta = 2 5 data hold years *1 40 - - years ta = 2 5 shipment data all address ffffh *1 not 100% tested electrical characteristics (unless otherwise specified, vcc=1.7~5.5v, ta=-40~+85 ) parameter symbol limits unit condition min. typ. max. ?l? input voltage 1 v il1 -0.3 - 0.2 vcc v ?h? input voltage 1 v ih1 0.8 vcc - vcc+0.3 v ?l? output voltage 1 v ol1 0 - 0.4 v i ol =2.1ma, 4.0v Q vcc Q 5.5v ?l? output voltage 2 v ol2 0 - 0.2 v i ol =100 a ?h? output voltage 1 v oh1 2.4 - vcc v i oh =-0.4ma, 4.0v Q vcc Q 5.5v ?h? output voltage 2 v oh2 vcc-0.2 - vcc v i oh =-100 a input leak current i li -1 - +1 a v in =0v~vcc output leak current i lo -1 - +1 a v out =0v~vcc, cs=0v current consumption at action i cc1 - - 3.0 ma f sk =2mhz, t e/w =5ms (write) i cc2 - - 1.5 ma f sk =2mhz (read) standby current i sb - - 2 a cs=0v, do=open radiation resistance design is not made.
bu9891gul-w 3/17 www.rohm.com 2010.07 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note action timing characteristics (ta=-40~+85 , vcc=2.5~5.5v) parameter symbol 2.5v Q vcc Q 5.5v unit min. typ. max. sk frequency f sk - - 2 mhz sk ?h? time t skh 230 - - ns sk ?l? time t skl 230 - - ns cs ?l? time t cs 200 - - ns cs setup time t css 200 - - ns di setup time t dis 100 - - ns cs hold time t csh 0 - - ns di hold time t dih 100 - - ns data ?1? output delay time t pd1 - - 200 ns data ?0? output delay time t pd0 - - 200 ns time from cs to output establishment t sv - - 150 ns time from cs to high-z t df - - 150 ns write cycle time t e/w - - 5 ms (ta=-40~+85 , vcc=1.7~2.5v) parameter symbol 1.7v Q vcc Q 2.5v unit min. typ. max. sk frequency f sk - - 500 khz sk ?h? time t skh 0.8 - - us sk ?l? time t skl 0.8 - - us cs ?l? time t cs 1 - - us cs setup time t css 200 - - ns di setup time t dis 100 - - ns cs hold time t csh 0 - - ns di hold time t dih 100 - - ns data ?1? output delay time t pd1 - - 0.7 us data ?0? output delay time t pd0 - - 0.7 us time from cs to output establishment t sv - - 0.7 us time from cs to high-z t df - - 200 ns write cycle time t e/w - - 5 ms sync data input / output timing data is taken by di sync with the rise of sk. at read action, data is output from do in sync with the rise of sk. the status signal at write (ready / busy) is output after tcs fr om the fall of cs after write command input, at the area do where cs is ?h?, and valid until the next command start bi t is input. and, while cs is ?l?, do becomes high-z. after completion of each mode execution, set cs ?l? once for internal circuit reset, and execute the following action mode. fig.1 sync data input / output timing c s sk do ( re ad ) di do ( write ) tcss tsk h ts kl tcs h tdis tdih tpd1 tpd0 tdf s tat u s va l i d
bu9891gul-w 4/17 www.rohm.com 2010.07 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note bu9891gul-w characteristic data (the following characteristic data are typ. values.) 0 0.5 1 1.5 2 2.5 0123456 vcc[v] icc2(read)[ma] spec fsk=2mhz data=0000h ta=-40 ta=25 ta=85 0 1 2 3 4 5 0123456 vcc[v] icc1(write)[ma] spec fsk=2mhz data=0000h ta=-40 ta=25 ta=85 0 1 2 3 4 5 6 0123456 vcc[v] vih[v] spec ta=-40 ta=25 ta=85 0 1 2 3 4 5 0 0.4 0.8 1.2 1.6 ioh[ma] voh[v] spec ta=-40 ta=25 ta=85 0 1 2 3 4 5 0 0.4 0.8 1.2 1.6 ioh[ma] voh[v] spec ta=-40 ta=25 ta=85 0 0.2 0.4 0.6 0.8 1 1.2 0123456 vcc[v] ili[a] spec ta=-40 ta=25 ta=85 0 0.2 0.4 0.6 0.8 1 1.2 0123456 vcc[v] ilo[a] spec ta=-40 ta=25 ta=85 0 1 2 3 4 5 6 0123456 vcc[v] vil[v] ta=-40 ta=25 ta=85 spec 0 0.2 0.4 0.6 0.8 1 012345 iol[ma] vol[v] spec ta=-40 ta=25 ta=85 0 0.2 0.4 0.6 0.8 1 012345 iol[ma] vol[v] spec ta=-40 ta=25 ta=85 0 0.2 0.4 0.6 0.8 1 012345 iol[ma] vol[v] spec ta=-40 ta=25 ta=85 0 1 2 3 4 5 0 0.4 0.8 1.2 1.6 ioh[ma] voh[v] spec ta=-40 ta=25 ta=85 fig.2 h input voltage vil(cs,sk,di) fig.3 l input voltage vil(cs,sk,di) fig.4 l output voltage vol-iol(vcc=1.8v) fig.5 l output voltage vol-iol(vcc=2.5v) fig.6 l output voltage vol-iol(vcc=4.0v) fig.7 h output voltage voh-ioh(vcc=1.8v) fig.8 h output voltage voh-ioh(vcc=2.5v) fig.9 h output voltage voh-ioh(vcc=4.0v) fig.10 input leak current ili(cs,sk,di) fig.11 output leak current ilo (do) fig.12 current consumption at write action icc1 (write, fsk=2mhz) fig.13 consumption current at read action icc2 (read, fsk=2mhz)
bu9891gul-w 5/17 www.rohm.com 2010.07 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note bu9891gul-w characteristic data (the following characteristic data are typ. values.) -50 0 50 100 150 0123456 vcc[v] tdih[ns] spec ta=-40 ta=25 ta=85 0 0.5 1 1.5 2 2.5 0123456 vcc[v] isb[a] spec ta=-40 ta=25 ta=85 -200 -100 0 100 200 300 0123456 vcc[v] tcss[ns] spec ta=-40 ta=25 ta=85 0.01 0.1 1 10 100 0123456 vcc[v] fsk[mhz] spec spec ta=-40 ta=25 ta=85 -200 -150 -100 -50 0 50 0123456 vcc[v] tcsh[ns] spec ta=-40 ta=25 ta=85 0 0.2 0.4 0.6 0.8 1 0123456 vcc[v] tpd0 [s] spec spec ta=-40 ta=25 ta=85 0 0.2 0.4 0.6 0.8 1 0123456 vcc[v] tskh [s] spec spec ta=-40 ta=25 ta=85 0 0.2 0.4 0.6 0.8 1 0123456 vcc[v] tskl[s] spec spec ta=-40 ta=25 ta=85 -50 0 50 100 150 0123456 vcc[v] tdis[ns] spec ta=-40 ta=25 ta=85 0 0.2 0.4 0.6 0.8 1 1.2 0123456 vcc[v] tcs[s] spec spec ta=-40 ta=25 ta=85 0 1 2 3 4 5 0123456 vcc[v] icc1(write)[ma] spec fsk=500khz data=0000h ta=-40 ta=25 ta=85 0 0.5 1 1.5 2 2.5 0123456 vcc[v] icc2(read)[ma] spec fsk=500khz data=0000h ta=-40 ta=25 ta=85 fig.14 current consumption at write action fig.15 consumption current at read action icc2 (read, fsk=500khz) fig.16 consumption current at standby action isb fig.17 sk frequency fsk fig.18 sk high time tskh fig.19 sk low time tskl fig.20 cs low time tcs fig.21 cs hold time tcsh fig.22 cs setup time tcss fig.23 di hold time tdih fig.24 di setup time tdis fig.25 data 0 output delay time tpd0
bu9891gul-w 6/17 www.rohm.com 2010.07 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note bu9891gul-w characteristic data (the following characteristic data are typ. values.) 0 1 2 3 4 5 6 0123456 vcc[v] te/w[ms] spec ta=-40 ta=25 ta=85 0 0.2 0.4 0.6 0.8 1 0123456 vcc[v] tsv[s] spec spec ta=-40 ta=25 ta=85 0 50 100 150 200 250 0123456 vcc[v] tdf [ns] spec spec ta=-40 ta=25 ta=85 0 0.2 0.4 0.6 0.8 1 0123456 vcc[v] tpd1 [s] spec spec ta=-40 ta=25 ta=85 fig.26 output data 1 delay time tpd1 fig.27 time from cs to output establishment tsv fig.28 time from cs to high-z tdf fig.29 write cycle time te/w
bu9891gul-w 7/17 www.rohm.com 2010.07 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note block diagram fig.30 block diagram pin assignment and function fig.31 pin assignment diagram land no. pin name i / o function a1 di input start bit, op.code, address, serial data input a2 do output serial data out put, ready/busy status output a3 vcc - power supply b1 sk input serial data clock input b2 gnd - grand (0v) b3 cs input chip select command decode control clock generation power source voltage detection write prohibition high voltage occurrence command register address buffer sk di dummy bit do data register r/w amplifier 16bit 16bit 4,096 bit eeprom cs address decoder 8bit 8bit b1 a1 b2 a2 b3 a3 b a 1 2 3 (sk) (gnd) (cs) (di) (do) (vcc)
bu9891gul-w 8/17 www.rohm.com 2010.07 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note description of operations communications of the microwire bus are carried out by sk (seria l clock), di (serial data input),do (serial data output) ,and cs (chip select) for device selection. when to connect one eeprom to a microcontroller, connect it as shown in fig.32(a) or fig.32(b). when to use the input and output common i/o port of the microcontrolle r, connect di and do via a resistor as shown in fig.32(b), and connection by 3 lines is available. in the case of plural connections, refer to fig. 32 (c). fig.32 connection method with microcontroller communications of the microwire bus are started by the first ?1? input after the rise of cs. this input is called a start bit. after input of the start bit, inputs ope c ode, address and data. address and data are input all in msb first manners. ?0? input after the rise of cs to the star t bit input is all ignored. therefore, when there is limitation in the bit width of p io of the microcontroller, input ?0? before the star t bit input, to control the bit width. command mode command start bit ope code address data read (read) *1 1 10 a7,a6,a5,a4,a3,a2,a1,a0 d15~d0(read data) write enable (wen) 1 00 1 1 * * * * * * write (write) *2 1 01 a7,a6,a5,a4,a3,a2,a1,a0 d15~d0(write data) write disable (wds) 1 00 0 0 * * * * * * ? input the address and the data in msb first manners. ? as for *, input either vih or vil. *start bit acceptance of all the comm ands of this ic starts at recognition of the start bit. the start bit means the first ?1? input after the rise of cs. *1 as for read, by continuous sk clock input after settin g the read command, data output of the set address starts, and address data in significant order are sequentially output continuously. (auto increment function) *2 when the read and the write all commands are executed, data written in the selected memory cell is automatically deleted, an d input data is written. fig.32-(a) connection by 4 lines cs sk do di cs sk do cs sk di do fig.32-(b) connection by 3 lines cs sk di do cs2 cs1 cs0 sk do di cs sk di do device 1 cs sk di do device 2 cs sk di do device 3 fig.32-(c) connection exam ple of plural devices micro- controller bu9891gul-w micro- controller micro- controller bu9891gul-w
bu9891gul-w 9/17 www.rohm.com 2010.07 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note timing chart 1) read cycle (read) *1 start bit when data ?1? is input for the first time after the rise of cs, this is recognized as a start bit. and when ?1? is input after plural ?0? are input, it is recognized as a start bit, and the following operation is started. this is common to all the commands to described hereafter. fig. 33 read cycle when the read command is recognized, input address data (16bit) is output to serial. and at that moment, at taking a0, in sync with the rise of sk, ?0? (dummy bit) is output. and, the following data is output in sync with the rise of sk. this ic has an address auto increment function valid only at read command. this is the function where after the above read execution, by continuously inputting sk clock, the abov e address data is read sequent ially. and, during the auto increment, keep cs at ?h?. 2) write cycle (write) fig.34 write cycle in this command, input 16bit data (d15~d0) are written to desi gnated addresses (am~a0). the actual write starts by the fall of cs of d0 taken sk clock. when status is not detected, (cs=?l? fixed) max. 5ms in conformity with te/w, and when status is detected (cs=?h?), all commands are not accepted for areas where ?l? (busy) is output from d0, therefore, do not input any command. 3) write enable (wen) / disable (wds) cycle fig.35 write enable (wen) / disable (wds) cycle at power on, this ic is in write disable status by the inte rnal reset circuit. before executing the write command, it is necessary to execute the write enable comm and. and, once this command is executed, it is valid unitl the write disable command is executed or the power is turned off. however, the read command is valid irre spective of write enable / diable command. input to sk after 6 clocks of this command is available by either ?h? or ?l?, but be sure to input it. when the write enable command is executed after power on, write enable status gets in. when the write disable command is executed then, the ic gets in write disable status as same as at power on, and then the write command is canceled thereafter in software manner. however, the read command is executable. in write enable status, even when the write command is input by mistake, wr ite is started. to prevent such a mist ake, it is recommended to execute the write disable command after completion of write. cs 1 2 1 4 high-z 1 a 7 a 1 a 0 0 d15 d14 d1 d15 d14 *1 *2 d0 sk di do 0 n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w 27 28 cs 1 2 1 4 high-z 0 a 7 a 1 a 0 d15 d14 d1 n? :w n? :w d0 sk di do 1 n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w 27 status tcs tsv busy n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w te/w ready cs 1 2 1 5 high-z 0 0 sk di do 11 3 4 6 7 8 enable=1 1 disable=0 0 n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w
bu9891gul-w 10/17 www.rohm.com 2010.07 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note application 1) method to cancel each command read write 2) at standby standby current when cs is ?l?, sk input is ?l?, di input is ?h?, and even with middle electric potential, current does not increase. timing as shown in fig.38, when sk at standby is ?h?, if cs is started, di status may be read at the rise edge. at standby and at power on/off, when to start cs , set sk input or di input to ?l? status. fig.36 read cancel available timing note 1) if vcc is made off in this area, designated address data is not guaranteed, therefore write once again. note 2) if cs is started at the same timing as that of the sk rise, write execution/cancel becomes unstable, therefore, it is recommended to fail in sk=?l? area. as for sk rise, necessary timing of tcss/tcsh or higher. fig.37 write cancel available timing start bit ope code address data 1bit 2bit 8bit 16bit cancel is available in all areas in read mode. ? method to cancel cancel by cs=?l? start bit ope code address data te/w a *1 1bit 2bit 8bit 16bit b a from start bit to 27 clock rise 1 cancel by cs=?l? b 27 clock rise and after 1 cancellation is not available by any means. if vcc is m ade off in this area, designated address data is not guaranteed, therefore write once again. and when sk clock is input continuously, cancellation is not available. cs sk di start bit input cs=sk=di=?h? wrong recognition as a start bit cs sk di start bit input if cs is started when sk=?l? or di=?l?, a start bit is recognized correctly. fig.38 wrong action timing fig.39 normal action timing sk ? 27 rise of clock *1 d1 enlarged figure d0 di 26 27
bu9891gul-w 11/17 www.rohm.com 2010.07 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note 3) equivalent circuit 4) i/o peripheral circuit 4-1) pull down cs. by making cs=?l? at power on/off, mistake in operation and mistake write are prevented. pull down resistance rpd of cs pin to prevent mistake in operation and mi stake write at power on/off, cs pull down resistance is necessary. select an appropriate value to this resistance value from microc ontroller voh, ioh, and vil characteristics of this ic. 4-2) do is available in both pull up and pull down. do output become ?high-z? in other ready / busy outpu t timing than after data output at read command and write command. when malfunction occurs at ?high-z? input of the microcontroller port connected to do, it is necessary to pull down and pull up do. when there is no influence upon the microcontroller actions, do may be open. if do is open, and at timing to output st atus ready, at timing of cs=?h?, sk= ?h?, di=?h?, eeprom recognizes this as a start bit, resets ready output, and do=?high-z?, ther efore, ready signal cannot be detected. to avoid such output, pull up do pin for improvement. fig.45 ready output timing at do=open output circuit do oeint. input citcuit cs csint. reset int. input circuit di cs int. input circuit sk cs int. fig.40 output circuit (do) fig.42 input circuit (di) fig.41 input circuit (cs) fig.43 input circuit (sk) microcontroller vohm ?h? output iohm rpd vihe ?l? input eeprom fig.44 cs pull down resistance vohm iohm rpd R ??? 2.4 2 10 -3 rpd R 1.2 [k ] vohm R vihe ??? rpd R example) when v cc =5v, vihe=2v, vohm=2.4v, iohm=2ma, from the equation , ? vihe ? vohm ? iohm with the value of rpd to satisfy the above equation, vohm becomes 2.4v or higher, and vihe (=2.0v), the equation is also satisfied. : eeprom vih specifications : microcontroller voh specifications : microcontroller ioh specifications cs sk di do d0 busy ready high-z enlarged cs sk di do busy high-z improvement by do pull up busy ready cs=sk=di=?h? when do=open cs=sk=di=?h? when do=pull up do ?h?
bu9891gul-w 12/17 www.rohm.com 2010.07 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note pull up resistance rpu and pull down resistance rpd of do pin as for pull up and pull down resistance value, select an appropr iate value to this resistance value from microcontroller vih, vil, and voh, ioh, vol, iol characteristics of this ic. 5) ready / busy status display (do terminal) this display outputs the internal status si gnal. when cs is started after tcs (min.200ns) from cs fall after write command input, ?h? or ?l? is output. r/b display ?l? (busy) = write under execution after the timer circuit in the ic works and creat es the period of te/w, this time circuit completes automatically. and write to the memory cell is made in t he period of te/w, and during this period, other command is not accepted. r/b display = ?h? (ready) = command wait status even after te/w (max.5ms) from write of the memory cell, the following command is accepted. therefore, cs=?h? in the period of te/w, and wh en input is in sk, di, malfunction may occur, therefore, di=?l? in the area cs=?h?. (especially, in the ca se of shared input port, attention is required.) *do not input any command while status signal is output. command i nput in busy area is cancelled, but command input in ready ar ea is accepted. therefore, status ready output is cancelled, and malfunction and mistake write may be made. fig.48 r/b status output timing chart microcontroller vilm ?l? input iole vole ?l? output eeprom rpu microcontroller vihm ?h? input iohe vohe ?h? output eeprom rpd fig.46 do pull up resistance cs high-z sk di do clock write instruction ready busy status rpu R ??? 5 0.4 2.1 10 -3 rpu R 2.2 [k ] vole Q vilm ??? rpu R example) when v cc =5v , vole=0.4v, iole=2.1ma, vilm=0.8v, from the equation , vcc vole iole with the value of rpu to satisfy the above equation, vole becomes 0.4v or below, and with vilm(=0.8v), the equation is also satisfied. rpd R ??? 5 0.2 0.1 10 -3 rpd R 48 [k ] vohe R vihm ??? rpd R example) when v cc =5v , vohe=vcc 0.2v, iohe=0.1ma, vihm=vcc 0.7v from the equation , vohe iohe with the value of rpd to satisfy the above equation, vohe becomes 2.4v or below, and with vihm (=3.5v), the equation is also satisfied. fig.47 do pull down resistance (do status) (do status) t sv : eeprom vol specifications : eeprom iol specifications : microcontroller vil specifications ? vole ? iole ? vilm : eeprom voh specifications : eeprom ioh specifications : microcontroller vih specifications ? vohe ? iohe ? vihm
bu9891gul-w 13/17 www.rohm.com 2010.07 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note 6) when to directly connect di and do this ic has independent input terminal di and output terminal do, and separate signals are handled on timing chart, meanwhile, by inserting a resistance r between these di and do terminals, it is possible to carry out control by 1 control line. fig.49 di, do control line common connection data collision of microcontroller di/o output and do output and feedback of do output to di input. drive from the microcontro ller di/o output to di input on i/o timing, and signal output from do output occur at the same time in the following points. (1) 1 clock cycle to take in a0 address data at read command dummy bit ?0? is output to do terminal. when address data a0 = ?1? input, through current route occurs. (2) timing of cs = ?h? after write command. do terminal in ready / busy function output. when the next start bit input is recognized, ?high-z? gets in. especially, at command input after write, when cs in put is started with microcontroller di/o output ?l?, ready output ?h? is output from do te rminal, and through current route occurs. feedback input at timing of these (1) and (2) does not cause di sorder in basic operations, if resistance r is inserted. note) as for the case (2), attentio n must be paid to the following. when status ready is output, do and di are shared, di=?h? and the microcontroller di/o=?high-z? or the microcontroller di/o=?h? ,if sk clock is input, do output is input to di and is recognized as a start bit, and malfunction may occur. as a method to avoid malfunction, at status ready output, set sk=?l?, or start cs within 4 cl ocks after ?h? of ready signal is output. microcontroller di/o port di eeprom do r eeprom cs input eeprom sk input eeprom di input eeprom do output microcontroller di/o port a1 high-z collision of di input and do output ?h? a0 0 d15 d14 d13 a1 a0 high-z microcontroller output microcontroller input fig.50 collision timing at read data output at di, do direct connection eeprom cs input eeprom sk input eeprom di input eeprom do output microcontroller di/o port write command microcontroller output busy busy ready ready ready collision of di input and do output n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w n? :w high-z write command write command write command write command microcontroller input microcontroller output fig.51 collision timing at di, do direct connection cs sk di do ready high-z start bit because di=?h?, set sk=?l? at cs rise. fig.52 start bit input timing at di, do direct connection
bu9891gul-w 14/17 www.rohm.com 2010.07 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note selection of resistance value r the resistance r becomes through current limit resistance at data collision. when through current flows, noises of power source line and instantaneous stop of power source may occur. when allowable through current is defined as i, the following relation should be satisfied. determine allow able current amount in consider ation of impedance and so forth of power source line in set. and insert resistance r, and set the value r to satisfy eeprom input level vih/vil even under influence of voltage decline owing to leak current and so forth. insertion of r will not cause any influence upon basic operations. (1) address data a0 = ?1? input, dummy bit ?0? output timing (when microcontroller di/o output is ?h?, eeprom do outputs ?l?, and ?h? is input to di) ? make the through current to eeprom 10ma or below. ? see to it that the level vih of eeprom should satisfy the following. (2) do status ready output timing (when the microcontroller di/o is ?l?, eeprom do output ?h?, and ?l? is input to di) ? set the eeprom input level vil so as to satisfy the following. example) when vcc=5v, vohm=5v, iohm=0.4ma, volm=5v, iolm=0.4ma, microcontroller di/o port di eeprom do r ?h? output iohm vohm vole ?l? output fig.53 circuit at di, do direct connection (microcontroller di/o ?h? output, eeprom ?l? output) conditions vohm Q vihe vohm Q iohm r + vole at this moment, if vole=0v, vohm Q iohm r r R ??? vohm iohm microcontroller di/o port di eeprom do r ?l? output iohm volm vohe ?h? output conditions volm R vile volm R vohe ? iolm r as this moment, vohe=vcc volm R vcc ? iolm r ??? vcc ? volm iolm fig.54 circuit at di, do direct connection (microcontroller di/o ?l? output, eeprom ?h? output) from the equation , from the equation , r R r R vohm iohm 5 0.4 10 -3 r R 12.5 [k ? ] ??? r R r R vcc ? volm iolm 5 ? 0.4 2.1 10 -3 r R 2.2 [k ? ] ??? therefore, from the equations and , r R 12.5 [k ? ] : eeprom vih specifications : eeprom vol specifications : microcontroller voh specifications : microcontroller ioh specifications ? vihe ? vole ? vohm ? iohm : eeprom vil specifications : eeprom voh specifications : microcontroller vol specifications : microcontroller iol specifications ? vile ? vohe ? volm ? iolm
bu9891gul-w 15/17 www.rohm.com 2010.07 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note 7) notes on power on/off ? at power on/off, set cs ?l?. when cs is ?h?, this ic gets in input accept status (active) . if power is turned on in this status, noises and the likes may cause malfunction, mistake write or so. to prevent these, at power on, set cs ?l ?. (when cs is in ?l? status, all inputs are cancelled.) and at power decline, owing to power line capaci ty and so forth, low power status may continue long. at this case too, owing to the same reason, malfunction, mistake write may occur, therefore, at power off too, set cs ?l?. fig.55 timing at power on/off por citcuit this ic has a por (power on reset) circuit as a mistak e write countermeasure. after por action, it gets in write disable status. the por circuit is valid only when power is on, and does not work when power is off. however, if cs is ?h? at power on/off, it may become write enable status owing to noises and the likes. for secure actions, observe the follwing conditions. 1. set cs=?l? 2. turn on power so as to satisfy the recommended co nditions of tr, toff, vbot for por circuit action. lvcc circuit lvcc (vcc-lockout) circuit prevents data rewrite acti on at low power, and prevents wrong write. at lvcc voltage (typ.=1.2v) or below, it prevent data rewrite. 8) noise countermeasures vcc noise (bypass capacitor) when noise or surge gets in the power source line, malfunc tion may occur, therefore, for removing these, it is recommended to attach a by pass capacitor (0.1 f) between ic vcc and gnd, at that moment, attach it as close to ic as possible.and, it is also recommended to attach a bypass capacitor between board vcc and gnd. sk noise when the rise time (tr) of sk is long, and a certain degree or more of noise exists, malfunction may occur owing to clock bit displacement. to avoid this, a schmitt trigger circuit is bu ilt in sk input. the hysteresis width of this circuit is set ab out 0.2v, if noises exist at sk input, set the noise amplitude 0.2v p-p or below. and it is recommended to set the rise time (tr) of sk 100ns or below. in the case when the rise time is 100ns or higher, take sufficient noise countermeasures. make the clock rise, fall time as small as possible. t off t r vbot 0 v cc t r t off vbot 10ms or below 10ms or higher 0.3v or below 100ms or below 10ms or higher 0.2v or below vcc gnd vcc gnd vcc cs bad example good example fig.56 rise waveform diagram (bad example)cs pin is pulled up to vcc. in this case, cs becomes ?h? (active st atus), and eeprom may have malfunction, mistake write owing to noise and the likes. even when cs in p ut is hi g h-z , the status becomes like this case , which p lease note. (good example)it is ?l? at power on/off. set 10ms or higher to recharge at power off. when power is turned on without observing this condition, ic internal circuit may not be reset, which please note. recommended conditions of t r , t off , vbot
bu9891gul-w 16/17 www.rohm.com 2010.07 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note notes for use (1) described numeric values and data are design repr esentative values, and the values are not guaranteed. (2) we believe that application circuit examples are recommendab le, however, in actual use, confirm characteristics further sufficiently. in the case of use by changing the fixed number of external parts, make your decision with sufficient margin in consideration of static characteristics and transition characteristics and fluct uations of external parts and our lsi. (3) absolute ma ximum ratings if the absolute maximum ratings such as impressed voltage and action temperature range and so forth are exceeded, lsi may be destructed. do not impress voltag e and temperature exceeding the absolute ma ximum ratings. in the case of fear exceeding the absolute maximum ratings, take physical safety countermeasures such as fuses, and see to it that conditions exceeding the absolute maximum ratings should not be impressed to lsi. (4) gnd electric potential set the voltage of gnd terminal lowest at any action condition. make sure that eac h terminal voltage is not lower than that of gnd terminal in consider ation of transition status. (5) heat design in consideration of allowable loss in actual use cond ition, carry out heat design with sufficient margin. (6) terminal to terminal shortcircuit and wrong packaging when to package lsi onto a board, pay su fficient attention to lsi direction and displacement. wrong packaging may destruct lsi. and in the case of shortcircuit between lsi terminals and terminals and power source, terminal and gnd owing to foreign matter, lsi may be destructed. (7) use in a strong electromagnetic field may cause ma lfunction, therefore, eval uate design sufficiently
bu9891gul-w 17/17 www.rohm.com 2010.07 - rev. a ? 2010 rohm co., ltd. all rights reserved. technical note ordering part number b u 9 8 9 1 g u l - w e 2 part no. part no. package gul : vcsp50l1 w-cell packaging and forming specification e2: embossed tape and reel (unit : mm) vcsp50l1 (bu9891gul-w) s 0.06 s a b a 0.05 1pin mark 3 0.30.05 6- 0.250.05 1.600.05 2 ( 0.15)index post 1 0.250.05 b 0.55max 1.000.05 a 0.10.05 0.5 p=0.5 2 b ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tape quantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 3000pcs e2 () direction of feed reel 1pin
r1010 a www.rohm.com ? 2010 rohm co., ltd. all rights reserved. notice rohm customer support system http://www.rohm.com/contact/ thank you for your accessing to rohm product informations. more detail product informations and catalogs are available, please contact us. notes no copying or reproduction of this document, in part or in whole, is permitted without the consent of rohm co.,ltd. the content specied herein is subject to change for improvement without notice. the content specied herein is for the purpose of introducing rohm's products (hereinafter "products"). if you wish to use any such product, please be sure to refer to the specications, which can be obtained from rohm upon request. examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the products. the peripheral conditions must be taken into account when designing circuits for mass production. great care was taken in ensuring the accuracy of the information specied in this document. however, should you incur any damage arising from any inaccuracy or misprint of such information, rohm shall bear no responsibility for such damage. the technical information specied herein is intended only to show the typical functions of and examples of application circuits for the products. rohm does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by rohm and other parties. rohm shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. the products specied in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, ofce-automation equipment, commu- nication devices, electronic appliances and amusement devices). the products specied in this document are not designed to be radiation tolerant. while rohm always makes efforts to enhance the quality and reliability of its products, a product may fail or malfunction for a variety of reasons. please be sure to implement in your equipment using the products safety measures to guard against the possibility of physical injury, re or any other damage caused in the event of the failure of any product, such as derating, redunda ncy, re control and fail-safe designs. rohm shall bear no responsibility whatsoever for your use of any product outside of the prescribed scope or not in accordance with the instruction manual. the products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospac e machinery, nuclear-reactor controller, fuel- controller or other safety device). rohm shall bear no responsibility in any way for use of any of the products for the above special purposes. if a product is intended to be used for any such special purpose, please contact a rohm sales representative before purchasing. if you intend to export or ship overseas any product or technology specied herein that may be controlled under the foreign exchange and the foreign trade law, you will be required to obtain a license or permit under the law.

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